cell library
英 [sel ˈlaɪbrəri]
美 [sel ˈlaɪbreri]
网络 单元库; 元件库; 标准元件库; 标准单元库; 元件资料库
双语例句
- The Optimization Method of Register in 0.13 μ m Standard Cell Library
0.13μm标准单元库中寄存器的优化方法 - Research on the Technique of GaAs ASIC Standard Cell Library
GaAsASIC标准单元库建库技术研究 - The design is accomplished using Top-down design flow and standard cell library method.
整个系统采用标准单元设计方式和Top-Down自上而下的设计方法。 - In this case, big cell library has become a barrier for shortening the time to enter to the market of VLSI products.
但就是在这种情况下，日益庞大的单元库也成为了VLSI由设计到产品，要求不断缩短进入市场周期的一个瓶颈。 - A methodology to design and characterize a DPA-resistant standard cell library is introduced in this paper, and then the designed standard cells are used to implement an S-box of DES.
给出了一个功耗恒定标准单元库的设计实现方法，并利用该标准单元库实现了DES密码算法中的S-盒。 - Decomposition of Multilevel Logic Functions Based on the Standard Cell Library
基于标准单元库的多级函数分解 - Design of Evaluation Circuit for a CMOS Standard cell Library
一种CMOS标准单元库的评估电路设计 - The technology to build up parameter library, which is based on the Mercury of COMPASS is presented. Some kinds of ASIC cell library and their application are presented briefly.
基于COMPASS的建库工具Mercury，阐述了建立参数库的技术，并简单介绍了几种典型的ASIC单元库及应用情况。 - In order to meet the requirement of civil enterprise on IC design, the author decides to develop the software on characterize of cell library.
本论文的主要工作就是开发出一套自动化程度高、建库时间短并且精度高的单元库特性化软件，以满足国内集成电路设计企业的需求。 - The experimental results demonstrate that the DPA-resistant standard cell library can counteract DPA attacks effectively.
实验结果表明，这种标准单元库能够很好地起到防DPA攻击的作用。 - It is impossible to have high level ASIC design without good cell library.
实践证明，没有良好的单元库就不可能进行高水平ASIC的设计。 - The meaning of ASIC cell library is given, the general method of building up ASIC cell library is discussed.
介绍了ASIC单元库的含义，阐述了建立ASIC单元库的一般方法。 - Traditional asynchronous integrated circuit design uses full custom design with low efficiency, because the asynchronous circuit implementation needs novel circuit structures which do not exist in traditional standard cell library.
为了以新颖的电路结构实现异步集成电路中的特殊功能，一般的异步集成电路设计都采用全定制的方法，设计效率不高。 - A non-clock delay-ring A/ D converter is presented, which is based on standard cell library and not sensitive to process variation.
提出了一种无需外部时钟、可以部分抵消工艺偏差、基于标准单元的延迟环A/D变换器。 - Research on the Method of Building up ASIC Cell Library
ASIC单元库建库方法的研究 - In Chapter 2, an approach is proposed for building gate delay model and interconnect delay model by extracting data from the standard cell library.
第二章：提出了从库中提取数据建立门延模型和连线时延模型的方法。 - The Clock-Delayed domino adder is 2. 2 × faster than static logic adder with the same cell library and technology.
这个时钟延迟多米诺加法器比使用相同单元库和技术的静态逻辑加法器快2.3倍。 - The integration of USB IP core into an MP3 decoding chip is presented. The design was implemented on the platform of 0.18 μ m standard cell library.
将USBIP核集成到一块MP3解码芯片上，其设计在0.18μm工艺平台中进行。 - It could be concluded from the practical experiment that the semi-custom design method based on extended standard cell library could shorten the critical path delay and improve circuit frequency effectively in mainstream technology design.
经过实验仿真和验证，主流工艺下基于可扩展标准单元的半定制电路设计方法能够有效地缩短关键路径延时，提升电路主频性能。 - However, SRAM compiler is designed to meet the needs of majority frameworks in variable size, and also the software that combines cell library design with automatic program.
然而，SRAM编译器可满足大多数容量可变的构架，是一种单元库设计与自动化程序结合的软件。 - Critical pah was analyzed logical effort model and extended cell library with perfect driving capability was constructed according to analysis result. Critical path was optimized by logic effort algorithm and shortest time-delay could be achieved by equality of cell gate effort in path.
采用逻辑功效模型分析关键路径，根据分析结果构建具有完备驱动能力的扩展单元库，采用逻辑功效算法优化关键路径，使得路径每一级单元的门功效相等，从而获得最短延时。 - The standard cell library is a foundation to ASIC Design, its quality and performance is vital to ASIC Design.
标准单元库是ASIC设计的基础，它的质量和性能对ASIC设计来说至关重要。 - Experimental results show that the semi-custom design methodology based on standard cell library extension can improve circuit performance effectively, which is especially appropriate for designs with large loads.
实验结果表明，基于标准单元库扩展的半定制设计方法可以有效提升电路的性能，这种方法尤其适用于电路负载过大的情况。 - As the foundation of modern digital circuit design, the Standard Cell library and its performance improvement has tremendous effect on the capability of digital circuit.
标准单元库作为数字电路设计的基础，其性能的改善对整体电路性能的提高有着十分重要的作用。 - And a basic cell Library can be built based on these modules.
而这些固定的模块，可以组成基本单元库。 - In order to take into account the performance and design time, semi-custom design method based on standard cell library is used to implement multiplier.
为了兼顾乘法器的性能和设计时间，通常使用基于标准单元库的半定制设计方法。 - Second, according to the feature of trap logic unit, we design the high driving capability, special logic and high-speed standard cells, which enhance the ability of standard cell library to support the trap logic unit, and it optimizes the critical path delay greatly.
其次，针对中断逻辑部件的特点，定制设计了大驱动、特殊逻辑和高速的标准单元，增强了标准单元库对中断逻辑部件的支持能力，缩短了关键路径的延时。